paper 2.3 Fast Extended Test Access via JTAG and FPGAs

Abstract
1. Introduction
2. State-of-the-Art in Boundary Scan
2.1 Test access via Boundary Scan
2.2 Boundary Scan speed considerations
2.3 Testing dynamic devices
3. FPGA-based TAM Extension
3.1 Alternative test data transport options
4. Experimental results